User’s ManualPrinted in Japan©78K/0 SeriesInstructionsDocument No. U12326EJ4V0UM00 (4th edition)Date Published October 2001 N CP(K)1995Common to 78K/
10 User's Manual U12326EJ4V0UMCHAPTER 5 EXPLANATION OF INSTRUCTIONS ...
100CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMReturn from BreakRETBReturn from Software Vectored Interrupt[Instruction for
CHAPTER 5 EXPLANATION OF INSTRUCTIONS101User's Manual U12326EJ4V0UM5.11 Stack Manipulation InstructionsThe following are stack manipulation in
102CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMPushPUSHPush[Instruction format] PUSH src[Operation] When src = rp When src
CHAPTER 5 EXPLANATION OF INSTRUCTIONS103User's Manual U12326EJ4V0UMPopPOPPop[Instruction format] POP dst[Operation] When dst = rp When dst = PS
104CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMMOVW SP, src Move WordMOVW AX, SP Word Data Transfer with Stack Pointer[Inst
CHAPTER 5 EXPLANATION OF INSTRUCTIONS105User's Manual U12326EJ4V0UM5.12 Unconditional Branch InstructionThe unconditional branch instruction i
106CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMBranchBRUnconditional Branch[Instruction format] BR target[Operation] PC ← t
CHAPTER 5 EXPLANATION OF INSTRUCTIONS107User's Manual U12326EJ4V0UM5.13 Conditional Branch InstructionsConditional branch instructions are sho
108CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMBranch if CarryBCConditional Branch with Carry Flag (CY = 1)[Instruction for
CHAPTER 5 EXPLANATION OF INSTRUCTIONS109User's Manual U12326EJ4V0UMBranch if Not CarryBNCConditional Branch with Carry Flag (CY = 0)[Instructio
11User's Manual U12326EJ4V0UMLIST OF FIGURESFigure No. Title Page2-1 Program Counter Configuration...
110CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMBranch if ZeroBZConditional Branch with Zero Flag (Z = 1)[Instruction format
CHAPTER 5 EXPLANATION OF INSTRUCTIONS111User's Manual U12326EJ4V0UMBranch if Not ZeroBNZConditional Branch with Zero Flag (Z = 0)[Instruction f
112CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMBranch if TrueBTConditional Branch by Bit Test (Byte Data Bit = 1)[Instructi
CHAPTER 5 EXPLANATION OF INSTRUCTIONS113User's Manual U12326EJ4V0UMBranch if FalseBFConditional Branch by Bit Test (Byte Data Bit = 0)[Instruct
114CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMBranch if True and ClearBTCLRConditional Branch and Clear by Bit Test (Byte
CHAPTER 5 EXPLANATION OF INSTRUCTIONS115User's Manual U12326EJ4V0UMDecrement and Branch if Not ZeroDBNZConditional Loop (R1 ≠ 0)[Instruction fo
116CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.14 CPU Control InstructionsThe following are CPU control instructions.SEL
CHAPTER 5 EXPLANATION OF INSTRUCTIONS117User's Manual U12326EJ4V0UMSelect Register BankSEL RBnRegister Bank Selection[Instruction format] SEL R
118CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMNo OperationNOPNo Operation[Instruction format] NOP[Operation] no operation[
CHAPTER 5 EXPLANATION OF INSTRUCTIONS119User's Manual U12326EJ4V0UMEnable InterruptEIInterrupt Enabled[Instruction format] EI[Operation] IE ← 1
12User's Manual U12326EJ4V0UMCHAPTER 1 MEMORY SPACE1.1 Memory SpacesThe 78K/0 Series product program memory map varies depending on the inte
120CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMDisable InterruptDIInterrupt Disabled[Instruction format] DI[Operation] IE ←
CHAPTER 5 EXPLANATION OF INSTRUCTIONS121User's Manual U12326EJ4V0UMHaltHALTHALT Mode Set[Instruction format] HALT[Operation] Set HALT Mode[Oper
122CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMStopSTOPStop Mode Set[Instruction format] STOP[Operation] Set STOP Mode[Oper
123User's Manual U12326EJ4V0UMAPPENDIX A REVISION HISTORYThe following table shows the revision history of the previous editions. The “Applie
124User's Manual U12326EJ4V0UMAPPENDIX B INSTRUCTION INDEX (MNEMONIC: BY FUNCTION)[8-bit data transfer instructions]MOV ... 49XCH ... 50[1
125User's Manual U12326EJ4V0UM[Unconditional branch instruction]BR ... 106[Conditional branch instructions]BC ... 108BNC ... 109BZ ... 110BNZ ..
126 User's Manual U12326EJ4V0UMAPPENDIX C INSTRUCTION INDEX (MNEMONIC: IN ALPHABETICAL ORDER)[A]ADD ... 55ADDC ... 56ADDW ... 64ADJBA ...
127User's Manual U12326EJ4V0UM[S]SEL RBn ... 117SET1 ... 90STOP ... 122SUB ... 57SUBC ... 58SUBW ... 65[X]XCH ... 50XCHW ... 53XOR ... 61XOR1 ..
128 User's Manual U12326EJ4V0UM[MEMO]
Although NEC has taken all possible stepsto ensure that the documentation suppliedto our customers is complete, bug freeand up-to-date, we readily acc
13CHAPTER 1 MEMORY SPACEUser's Manual U12326EJ4V0UM(3) RAM for VFD displayThere are some products in the 78K/0 Series to which RAM for VFD disp
14User's Manual U12326EJ4V0UMCHAPTER 2 REGISTERS2.1 Control RegistersThe control registers control the program sequence, statuses and stack me
15CHAPTER 2 REGISTERSUser's Manual U12326EJ4V0UM(1) Interrupt enable flag (IE)This flag controls the interrupt request acknowledgement operatio
16CHAPTER 2 REGISTERSUser's Manual U12326EJ4V0UMInterrupt andBRK instructionsPSWPC15-PC8PC15-PC8PC7-PC0Lower halfregister pairsSP SP _ 2SP
17CHAPTER 2 REGISTERSUser's Manual U12326EJ4V0UM2.2 General-Purpose RegistersGeneral-purpose registers are mapped at particular addresses (FEE
18CHAPTER 2 REGISTERSUser's Manual U12326EJ4V0UMFigure 2-6. General-Purpose Register Configuration(a) Absolute names(b) Functional namesBANK
19CHAPTER 2 REGISTERSUser's Manual U12326EJ4V0UM2.3 Special Function Registers (SFRs)Unlike a general-purpose register, each special-function
2User's Manual U12326EJ4V0UM[MEMO]
20User's Manual U12326EJ4V0UMCHAPTER 3 ADDRESSING3.1 Instruction Address AddressingAn instruction address is determined by program counter (PC
21CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM15 0PC8770fa10 to fa811 1000001643CALLFfa7 to fa03.1.2 Immediate addressing[Function]Immediat
22CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM15 115 0PC70Low addr.High addr.Memory (Table)Effective address+1Effective address0100000000878
23CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM3.1.4 Register addressing[Function]The register pair (AX) contents to be specified by an inst
24CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM3.2 Operand Address AddressingThe following methods are available to specify the register and
25CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM3.2.2 Register addressing[Function]Register addressing accesses a general-purpose register as
26CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM3.2.3 Direct addressing[Function]Direct addressing directly addresses the memory indicated by
27CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM150Short direct memoryEffectiveaddress11111118707OP codesaddr-offsetαWhen 8-bit immediate data
28CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM150SFREffective address11111118707OP codesfr-offset13.2.5 Special-function register (SFR) add
29CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM15 08D7E077 0ADEMemoryMemory address specified by register pair DEContents of memory to be add
3User's Manual U12326EJ4V0UMCaution: Purchase of NEC I2C components conveys a license under the Philips I2C Patent Rights to use thesecomponents
30CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM3.2.7 Based addressing[Function]8-bit immediate data is added to the contents of the HL regis
31CHAPTER 3 ADDRESSINGUser's Manual U12326EJ4V0UM3.2.9 Stack addressing[Function]The stack area is indirectly addressed with the stack pointer
32User's Manual U12326EJ4V0UMCHAPTER 4 INSTRUCTION SETThis chapter lists the instructions in the 78K/0 Series instruction set. The instructi
33CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM4.1.2 Description of “operation” columnA: A register; 8-bit accumulatorX: X registerB:
34CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM4.1.4 Description of number of clocks1 instruction clock cycle is 1 CPU clock cycle (fCP
35CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM 2nd Operand #byte A rNotesfr saddr !addr16 PSW [DE] [HL][HL+byte]$addr16 1
36CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM 2nd Operand A.bit sfr.bit saddr.bit PSW.bit [HL].bit CY $addr16 None1st O
37CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM(4) Call instructions/branch instructionsCALL, CALLF, CALLT, BR, BC, BNC, BZ, BNZ, BT, BF
38CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM4.2 Instruction Codes4.2.1 Description of instruction code tablerrpRBR2 R1 R0 reg P1 P0
39CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM4.2.2 Instruction code listInstructionMnemonicOperands Operation CodeGroup B1 B2 B3 B48-
4User's Manual U12326EJ4V0UMThe export of these products from Japan is regulated by the Japanese government. The export of some or all of thesep
40CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM16-Bit Data MOVW rp,#word 0001 0P1 P0 0 Low byte High byteTransfer saddrp,#word 1110 1110
41CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM8-Bit SUB A,#byte 0001 1101 DataOperation saddr,#byte 1001 1000 Saddr-offset DataA,r
42CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM8-Bit OR A,#byte 0110 1101 DataOperation saddr,#byte 1110 1000 Saddr-offset DataA,r
43CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UM16-Bit ADDW AX,#word 1100 1010 Low byte High byteOperation SUBW AX,#word 1101 1010 Low by
44CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UMBit OR1 CY,saddr.bit 0111 0001 0B2 B1 B00110 Saddr-offsetManipulationCY,sfr.bit 0111 0001
45CHAPTER 4 INSTRUCTION SETUser's Manual U12326EJ4V0UMUnconditionalBR !addr16 1001 1011 Low addr High addrBranch $addr16 1111 1010 jdispAX 0011
46User's Manual U12326EJ4V0UMCHAPTER 5 EXPLANATION OF INSTRUCTIONSThis chapter explains the instructions of 78K/0 Series products. Each ins
47CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMDESCRIPTION EXAMPLEMnemonic Full nameMoveMOVByte Data TransferMeaning of inst
48CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.1 8-Bit Data Transfer InstructionsThe following instructions are 8-bit dat
49CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMMoveMOVByte Data Transfer[Instruction format] MOV dst, src[Operation] dst ← s
5User's Manual U12326EJ4V0UMRegional InformationSome information contained in this document may vary from country to country. Before using any
50CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMExchangeXCHByte Data Exchange[Instruction format] XCH dst, src[Operation] dst
51CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.2 16-Bit Data Transfer InstructionsThe following instructions are 16-bit d
52CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMMove WordMOVWWord Data Transfer[Instruction format] MOVW dst, src[Operation]
53CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMExchange WordXCHWWord Data Exchange[Instruction format] XCHW dst, src[Operati
54CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.3 8-Bit Operation InstructionsThe following are 8-bit operation instructio
55CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMAddADDByte Data Addition[Instruction format] ADD dst, src[Operation] dst, CY
56CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMAdd with CarryADDCAddition of Byte Data with Carry[Instruction format] ADDC d
57CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMSubtractSUBByte Data Subtraction[Instruction format] SUB dst, src[Operation]
58CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMSubtract with CarrySUBCSubtraction of Byte Data with Carry[Instruction format
59CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMAndANDLogical Product of Byte Data[Instruction format] AND dst, src[Operation
6User's Manual U12326EJ4V0UMMajor Revisions in This EditionPage DescriptionThroughout Deletion of all information except for information common
60CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMOrORLogical Sum of Byte Data[Instruction format] OR dst, src[Operation] dst ←
61CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMExclusive OrXORExclusive Logical Sum of Byte Data[Instruction format] XOR dst
62CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMCompareCMPByte Data Comparison[Instruction format] CMP dst, src[Operation] ds
63CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.4 16-Bit Operation InstructionsThe following are 16-bit operation instruct
64CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMAdd WordADDWWord Data Addition[Instruction format] ADDW dst, src[Operation] d
65CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMSubtract WordSUBWWord Data Subtraction[Instruction format] SUBW dst, src[Oper
66CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMCompare WordCMPWWord Data Comparison[Instruction format] CMPW dst, src[Operat
67CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.5 Multiply/Divide InstructionsThe following are multiply/divide instructio
68CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMMultiply UnsignedMULUUnsigned Multiplication of Data[Instruction format] MULU
69CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMDivide Unsigned WordDIVUWUnsigned Division of Word Data[Instruction format] D
7User's Manual U12326EJ4V0UMINTRODUCTIONTarget Readers This manual is intended for users who wish to understand the functions of78K/0 Series pro
70CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.6 Increment/Decrement InstructionsThe following are increment/decrement in
71CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMIncrementINCByte Data Increment[Instruction format] INC dst[Operation] dst ←
72CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMDecrementDECByte Data Decrement[Instruction format] DEC dst[Operation] dst ←
73CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMIncrement WordINCWWord Data Increment[Instruction format] INCW dst[Operation]
74CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMDecrement WordDECWWord Data Decrement[Instruction format] DECW dst[Operation]
75CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.7 Rotate InstructionsThe following are rotate instructions.ROR ... 76ROL .
76CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMRotate RightRORByte Data Rotation to the Right[Instruction format] ROR dst, c
77CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMRotate LeftROLByte Data Rotation to the Left[Instruction format] ROL dst, cnt
78CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMRotate Right with CarryRORCByte Data Rotation to the Right with Carry[Instruc
79CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMRotate Left with CarryROLCByte Data Rotation to the Left with Carry[Instruct
8User's Manual U12326EJ4V0UMRelated DocumentsThe related documents indicated in this publication may include preliminary versions. However, pre
80CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMRotate Right DigitROR4Digit Rotation to the Right[Instruction format] ROR4 ds
81CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMRotate Left DigitROL4Digit Rotation to the Left[Instruction format] ROL4 dst[
82CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UM5.8 BCD Adjust InstructionsThe following are BCD adjust instructions.ADJBA .
CHAPTER 5 EXPLANATION OF INSTRUCTIONS83User's Manual U12326EJ4V0UMDecimal Adjust Register for AdditionADJBADecimal Adjustment of Addition Resul
84CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMDecimal Adjust Register for SubtractionADJBSDecimal Adjustment of Subtraction
CHAPTER 5 EXPLANATION OF INSTRUCTIONS85User's Manual U12326EJ4V0UM5.9 Bit Manipulation InstructionsThe following are bit manipulation instruct
86CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMMove Single BitMOV11 Bit Data Transfer[Instruction format] MOV1 dst, src[Oper
CHAPTER 5 EXPLANATION OF INSTRUCTIONS87User's Manual U12326EJ4V0UMAnd Single BitAND11 Bit Data Logical Product[Instruction format] AND1 dst, sr
88CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMOr Single BitOR11 Bit Data Logical Sum[Instruction format] OR1 dst, src[Opera
CHAPTER 5 EXPLANATION OF INSTRUCTIONS89User's Manual U12326EJ4V0UMExclusive Or Single BitXOR11 Bit Data Exclusive Logical Sum[Instruction forma
9User's Manual U12326EJ4V0UMCONTENTSCHAPTER 1 MEMORY SPACE ...
90CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMSet Single Bit (Carry Flag)SET11 Bit Data Set[Instruction format] SET1 dst[Op
CHAPTER 5 EXPLANATION OF INSTRUCTIONS91User's Manual U12326EJ4V0UMClear Single Bit (Carry Flag)CLR11 Bit Data Clear[Instruction format] CLR1 ds
92CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMNot Single Bit (Carry Flag)NOT11 Bit Data Logical Negation[Instruction format
CHAPTER 5 EXPLANATION OF INSTRUCTIONS93User's Manual U12326EJ4V0UM5.10 Call Return InstructionsThe following are call return instructions.CALL
94CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMCallCALLSubroutine Call (16 Bit Direct)[Instruction format] CALL target[Opera
CHAPTER 5 EXPLANATION OF INSTRUCTIONS95User's Manual U12326EJ4V0UMCall FlagCALLFSubroutine Call (11 Bit Direct Specification)[Instruction forma
96CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMCall TableCALLTSubroutine Call (Refer to the Call Table)[Instruction format]
CHAPTER 5 EXPLANATION OF INSTRUCTIONS97User's Manual U12326EJ4V0UMBreakBRKSoftware Vectored Interrupt[Instruction format] BRK[Operation] (SP– 1
98CHAPTER 5 EXPLANATION OF INSTRUCTIONSUser's Manual U12326EJ4V0UMReturnRETReturn from Subroutine[Instruction format] RET[Operation] PCL ← (SP)
CHAPTER 5 EXPLANATION OF INSTRUCTIONS99User's Manual U12326EJ4V0UMReturn from InterruptRETIReturn from Hardware Vectored Interrupt[Instruction
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