NEC PD75P308 User Manual download pdf (Page 21)

PD75P308

1600 ns

tKCY/2

-50

150 ns

tKCY/2 ns

0 250 ns

KCY ns

tKCY ns

SCK Cycle Time

SCK High-, Low-Level

Widths

SB0, 1 Set-Up Time (vs. SCK )

SB0, 1 Hold Time (vs. SCK )

SCK SB0, 1 Output

Delay Time

SCK SB0, 1

SB0, 1 SCK

SB0, 1 Low-Level Width

SB0, 1 High-Level Width

SBI MODE (SCK: internal clock output (master))

Parameter Symbol Conditions MIN. TYP. MAX. Unit

tKCY3

tKL3

tKH3

tSIK3

tKSI3

tKSO3

tKSB

tSBK

tSBL

tSBH

*: RL and CL are load resistance and load capacitance of the SO output line.

SBI MODE (SCK: external clock output (master))

*: R

L and CL are load resistance and load capacitance of the SO output line.

↑

RL = 1kΩ, CL = 100pF*

↓ →

↑ → ↓

↓ → ↓

SCK Cycle Time

SCK High-, Low-Level

Widths

SB0, 1 Set-Up Time (vs. SCK )

SB0, 1 Hold Time (vs. SCK )

SCK SB0, 1 Output

Delay Time

SCK SB0, 1

SB0, 1 SCK

SB0, 1 Low-Level Width

SB0, 1 High-Level Width

Parameter Symbol Conditions MIN. TYP. MAX. Unit

1600 ns

100 ns

tKCY/2 ns

0 300 ns

tKCY ns

KCY4

tKL4

tKH4

tSIK4

tKSI4

tKSO4

tKSB

tSBK

tSBL

tSBH

↑

RL = 1kΩ, CL = 100pF*

↓ →

↑ →

↓

↓ →

↓

★

400 ns

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 33 34

PD75P308 1

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NEC PD75P308 User Manual Page 21

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