NEC PD75P402 User Manual download pdf (Page 75)

CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS

5.3.2 Clock Output Mode Register (CLOM)

CLOM is a 4-bit register used to control clock output.

CLOM is set by a 4-bit memory handling instruction. Bit handling instructions cannot be used. Also, this register

cannot be read.

RESET input clears CLOM to zero and selects the clock output disabled state.

Fig. 5-19 Clock Output Mode Register Format

Note Ensure that 0 is written to bit 2 of CLOM.

Address

3210 Symbol

FD0H

CLOM3

CLOM1 CLOM0

CLOM

Clock output frequency selection bits ( ) : When fXX = 4.19 MHz

output* (1.05 MHz, 524 kHz, 65.5 kHz)

Setting prohibited

11fXX/2

output (65.5 kHz)

is the CPU clock selected by PCC

Clock output enable/disable bit

0 Output disabled

0 Output enabled

1 2 ... 70 71 72 73 74 75 76 77 78 79 80 ... 194 195

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NEC PD75P402 User Manual Page 75