NEC 2400 ipx User Manual Page 142

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CHAPTER 2 NDA-24296
Page 116
Revision 1.0
PH-SW10
Time Division Switch
Figure 2-52 shows the clock signal routing around the Phase Locked Oscillator (PLO).
Figure 2-52 PLO Function Diagram
When the system operates as the clock source office of the digital network, the OSC (PA-CK14) card is required,
and the OSC supplies the high-precision clock signals (±0.3 ppm deviation) for the base clock of the PLO. When
the system operates as the clock subordinate office, the TSW internal oscillator (±5 ppm deviation) can be the
base clock of the PLO. The source clock of the subordinate office is either the digital clock supply (DCS) or the
digital interface clock (DIU0 - DIU3). When the clock source failure has occurred, the PLO chooses another
clock source automatically in the order of:
1. DCS0
2. DCS1
3. DIU0
4. DIU1
5. DIU2
6. DIU3
7. Drifting with the TSW internal oscillator
TSW#1
(PH-SW10)
TSW#0 (PH-SW10)
TSW
TSW
PLO
PLO
OSC#1 (PA-CK14)
OSC#0 (PA-CK14)
DCS 0
DCS 1
DCS 1
DCS 0
DIU 0
DIU 1
DIU 2
DIU 3
Multiple connection on MDF
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